Abstract: A generalized efficient conflict-free address scheme for arbitrary point memory-based fast Fourier transform (FFT) processor was presented. In the proposed scheme, a high radix decomposition method was utilized to reduce the computation levels and small radix connected multipath-delay-commutator butterfly units were adopted to eliminate the complexity of the computation engine as well. Several important functions of memory-based FFT processor were combined together, including the continuous-flow mode, variable computation size and conflict-free address scheme. Moreover, a prime factor algorithm was employed to decrease the multiplications and the twiddle factor storage when there exist prime factors in the decomposition. At last, a unified Winograd Fourier transform algorithm (WFTA) butterfly core was designed for the small 2, 3, 4, 5 point DFTs to reduce the computation complexity further. Simulation results show that, the power cost of FFT processor can only be 40.8 mW in work frequency 122.88 MHz, it is very suitable for the LTE system.