CHEN Tao, LIAN Yixin, LI Wei, NAN Longmei. Design and Implementation of Integration Padding Reconfigurable Hash Algorithm CircuitJ. Transactions of Beijing institute of Technology, 2021, 41(6): 671-678. DOI: 10.15918/j.tbit1001-0645.2020.105
Citation: CHEN Tao, LIAN Yixin, LI Wei, NAN Longmei. Design and Implementation of Integration Padding Reconfigurable Hash Algorithm CircuitJ. Transactions of Beijing institute of Technology, 2021, 41(6): 671-678. DOI: 10.15918/j.tbit1001-0645.2020.105

Design and Implementation of Integration Padding Reconfigurable Hash Algorithm Circuit

  • In view of the lack of filling circuits in the implementation of existing domestic hash algorithms, and the existing designs do not support the SHA3 algorithm standard, a complete circuit was designed to support 11 common hash algorithms in 5 categories, including MD5, SHA1, SM3, SHA2 and SHA3 series. Firstly, analyzing 2 types of filling rules and 6 filling bit widths, the filling process was arranged with different states. Then, considering the characteristics of each arithmetic operation circuit and the reuse of operation unit resources, a reconfigurable operation circuit was designed. Finally, a complete circuit was integrated from algorithm filling to output. Compared with the software filling method under the synthesis of 55nm process library, the performance of SM3, SHA2 _ 384, and SHA2 _ 512 can be improved by 11%, 22% and 22% respectively.
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